The Microchip USB5734 hub is low-power, OEM configurable, USB 3.0 hub feature controller with 4 downstream portsand advanced features for embedded USB applications. The USB5734 is fully compliant with the USB 3.0 Specificationand USB 2.0 Link Power Management Addendum. The USB5734 supports 5 Gbps SuperSpeed (SS), 480 Mbps Hi-Speed (HS), 12 Mbps Full-Speed (FS), and 1.5 Mbps Low-Speed (LS) USB downstream devices on all enabled downstreamports.
The USB5734 supports the legacy USB speeds (HS/FS/LS) through a dedicated USB 2.0 hub feature controller that isthe culmination of five generations of Microchip hub feature controller design and experience with proven reliability,interoperability, and device compatibility. The SuperSpeed hub feature controller operates in parallel with the USB 2.0controller, decoupling the 5 Gbps SS data transfers from bottlenecks due to the slower USB 2.0 traffic.
The USB5734 enables OEMs to configure their system using “Configuration Straps.” These straps simplify the configurationprocess assigning default values to USB3.0 ports and GPIOs OEMs can disable ports, enable battery chargingand define GPIO functions as default assignments on power up removing the need for OTP or external SPI ROM.
The USB5734 supports both upstream battery charger detection and downstream battery charging. The USB5734 integratedbattery charger detection circuitry supports the USB-IF Battery Charging (BC1.2) detection method and mostApple devices. The USB5734 provides the battery charging handshake and supports the following USB-IF
• DCP: Dedicated Charging Port (Power brick with no data)
• CDP: Charging Downstream Port (1.5A with data)
• SDP: Standard Downstream Port (0.5A with data)
• Custom profiles loaded via SMBus or OTP
The USB5734 provides an additional USB endpoint dedicated for use as a USB to I2C/UART/SPI/GPIO interface, allowingexternal circuits or devices to be monitored, controlled, or configured via the USB interface. Additionally, theUSB5734 includes many powerful and unique features such as:FlexConnect, which provides flexible connectivity options. One of the USB5734’s downstream ports can be reconfiguredto become the upstream port, allowing master capable devices to control other devices on the hub.PortSwap, which adds per-port programmability to USB differential-pair pin locations.PortSwap allows direct alignmentof USB signals (D+/D-) to connectors to avoid uneven trace length or crossing of the USB differential signals on thePCB.
PHYBoost, which provides programmable levels of Hi-Speed USB signal drive strengthin the downstream port transceivers. PHYBoost attempts to restore USB signal integrityin a compromised system environment. The graphic on the right shows an example ofHi-Speed USB eye diagrams before and after PHYBoost signal integrity restoration. Ina compromised system environmentVariSense, which controls the USB receiver sensitivity enabling programmable levels of USB signal receive sensitivity.
This capability allows operation in a sub-optimal system environment, such as when a captive USB cable is used.The USB5734 can be configured for operation through internal default settings. Custom OEM configurations are supportedthrough external SPI ROM or OTP ROM. All port control signal pins are under firmware control in order to allowfor maximum operational flexibility, and are available as GPIOs for customer specific use.
The USB5734 is available in commercial (0℃ to +70℃) and industrial (-40℃ to +85℃) temperature ranges
• USB Hub Feature Controller IC with 4 USB 3.0/2.0downstream ports
• USB-IF Battery Charger revision 1.2 support onup & downstream ports (DCP, CDP,SDP)
• FlexConnect: Downstream port able to swap withupstream port, allowing master capable devicesto control other devices on the hub
• USB to I2C/UART/SPI/GPIO bridge endpoint support
• USB Link Power Management (LPM) support
• Enhanced OEM configuration options availablethrough either OTP or SPI ROM
• Available in 64-pin (9 x 9 mm) SQFN lead-free,RoHS compliant package
• Commercial and industrial grade temperaturesupport
• Configuration Straps: Predefined configuration ofsystem level functions including GPIOs